High Level Assembler - Extended Mnemonics for BRCL instruction

The table below lists all documented extended mnemomics for instruction BRCL (Branch Relative on Condition Long). Each extended mnemonic links to a text section with some additional info on the pertinent pseudo opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extended Mnemonics for BRCL

All instructions in this table are six bytes in length. The first byte always has a value of X'C0' and the second half of the second byte always has a value of X'4'. The first half of the second byte is the mask to be used for determining whether or not to take the branch. This mask designates the exact pseudo opcode.

Entries with a slightly darker background are not (and never were) supported by IBM's version of HLASM. The associated extended mnemonics are printed in italics.

C0.4 0 1 2 3 4 5 6 7 8 9 A B C D E F
  JLNOP
JGNOP
JLO
JGO
BROL
JLH
JGH
BRHL
JLP
JGP
BRPL
JGNLE JLL
JGL
BRLL
JLM
JGM
BRML
JGNHE JGLH JLNE
JGNE
BRNEL
JLNZ
JGNZ
BRNZL
JLE
JGE
BREL
JLZ
JGZ
BRZL
JGNLH JGHE JLNL
JGNL
BRNLL
JLNM
JGNM
BRNML
JGLE JLNH
JGNH
BRNHL
JLNP
JGNP
BRNPL
JLNO
JGNO
BRNOL
JLU
JG
BRUL

 

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